Abstract
Reliability of gold stud bump bonding must be questioned once process parameters are tweaked and dimensions shrunk to minimize costs for high volume MEMS assembly. 3D mock-up stacks representing a 0.5 x 1.0 mm MEMS die and its read-out integrated circuit were built using thermosonic and thermocompression chip-to-wafer bonding (TSB and TCB) with parameters targeting an optimized throughput. Electrical test circuits, daisy chains and Kelvin structures, were included in the design. Mechanical and electrical characterization was performed on samples directly after bonding and after environmental stressing in the form of thermal cycling and high temperature storage. Bond strength in the range of 40-60 MPa was measured after bonding. No degradation was observed after thermal cycling and an increased strength was measured after high temperature storage. Tilt in the range of 2.2 - 6.6 μm measured using white light interferometry was concluded to be a root cause of a limited yield for TSB. Fractography after shear testing, visual inspection of cross sections and electrical testing supported the hypothesis. On the other hand, tilt was measured to be in the range of 0.3 - 1.3 μm for TCB and this was concluded to be acceptable based on the same inspections and also based on stability of electrical properties measured in situ during environmental stressing. Tilt can be reduced by engineering of bond heads.
